TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 519

• Manufacturer Part Number: TMPM382FSFG
• Manufacturer: Toshiba

Specifications of TMPM382FSFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 64K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 64
• Package: QFP(14x14)
• Vcc: 5V
• Cpu Mhz: 40
• Ssp (ch) Spi: 1
• I2c/sio (ch): 1
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 10
• 16-bit Timer / Counter: 6
• Motor / Igbt Control: Y
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

19 Ocsillation Frequency Detector (OFD)
19.2 Configuration
detection frequency range is specified by OFDMX, OFDMN which are the detection frequency setting
registers. The lower detection frequency is specified by OFDMN registers and the higher detection
frequency is specified by OFDMX registers. Figure 19-2 shows the example of frequency detection
range.
registers is disabled. Therefore, the setting the detection frequency to these registers should be done
when the oscillation frequency detection is disabled. And writing to OFDCR2, OFDMX, OFDMN,
OFDRST registers is controlled by OFDCR1 register. To write OFDCR2, OFDMX, OFDMN, OFDRST
registers, the write enable code "0xF9" should be set to OFDCR1 beforehand. To enable the oscillation
frequency detector, set "0xE4" to OFDCR2 after setting "0xF9" to OFDCR1. Since the oscillation fre-
quency detection is disabled after an external reset input or POR (Power On Reset), write "0xF9" to
OFDCR1 and write "0xE4" to OFDCR2 register to enable its function.
registers, OFD(Oscillatiion Frequency Detection) reset will be generated and starting operation with
internal oscillator . (OFD circuit is disable) By the OFD reset, all I/Os except power supply pins, RESET,
X1,X2 and debug pins (PB3-PB7) are initialized as high impedance. If OFD reset is generated by
detecting the stopping of high frequency, the internal circuitries such as registers hold the condition at the
timing of oscillation stop. To initialize these internal circuitries, an external re-starting of oscillation is
needed.
OFDSTAT) are initialized by the reset generated from oscillation frequency detector, and then,
TMPM380 re-starts from internal OSC without detection of external OSC‘s frequency by OFD. Therefore
it is recommended to check which reset factor was occurred by the flag register in intial routine. For the
details, please refer the RSTFLG: Reset Flag Register
The oscillation frequency detection circuit is controlled by OFDCR1, OFDCR2 registers and the
When the oscillation frequency detection is enabled, writing to OFDCR2, OFDMX, OFDMN, OFDRST
When the TMPM380 detects the the frequency which is out of the range setting by OFDMX and OFDMN
All registers of oscillation frequency detector (OFDCR1, OFDCR2, OFDMX, OFDMN, OFDRST,
Note) The oscillation frequency detection reset is available only in NORMAL and IDLE modes. Before shifting to
STOP mode, SLOW mode and SLEEP mode, disable the oscillation frequency detection by software
（10MHz+3%）÷2
Subharmonic of
5 5.15 9
Figure 19-2 Detect frequency range (Example: 10MHz)
9.7
TMPM380/382 - 2 / 12 -
10
10.3
High harmonic of
（10MHz - 3%）×2
11 19.4 20
fosc2 [MHz]
detection unknown
detection area
Frequency
Frequency
TMPM380/382
area