TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 515
TMPM382FSFG
Manufacturer Part Number
TMPM382FSFG
Description
Manufacturer
Toshiba
Datasheet
1.TMPM380FWDFG.pdf
(700 pages)
Specifications of TMPM382FSFG
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
64K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
64
Package
QFP(14x14)
Vcc
5V
Cpu Mhz
40
Ssp (ch) Spi
1
I2c/sio (ch)
1
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
N
Cs/wait Controller (ch)
-
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
-
12-bit Ad Converter
10
16-bit Timer / Counter
6
Motor / Igbt Control
Y
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
Y
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
-
Comparators
-
Low-voltage Detector
Y
Etm Hardware Trace
2-bit
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18 Real Time Clock (RTC)
18.5.3 Entering the Low Power Consumption Mode
adjusting seconds or resetting the clock, be sure to observe one of the following procedures:
3. Disabling the clock
1. After changing the clock setting registers, setting the RTCPAGER<ADJUST> bit or
2. After changing the clock setting registers, setting the RTCPAGER<ADJUST> bit or
To enter SLEEP mode, in which the system clock stops, after changing clock data,
setting the RTCRESTR<RSTTMR> bit, wait for one second for an interrupt to be
generated.
setting the RTCRESTR<RSTTMR> bit, read the corresponding clock register values,
<ADJUST> or <RSTTMR> to make sure that the setting you have made is reflected.
again and enable the clock within one second before next 1Hz-interrupt.
Writing “0” to RTCPAGER<ENATMR> disables clock operation including a carry.
Stop the clock after the 1Hz-interrupt. The sec. counter keeps counting. Set the clock
Fig. 18-4 Flowchart of the disabling clock
TMPM380/M382 - 14 / 16 -
Writing the clock data
Enabling the clock
Disabling clock
Start
End
TMPM380/M382
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