XC908AS60ACFU Motorola Semiconductor Products, XC908AS60ACFU Datasheet - Page 230

• Manufacturer Part Number: XC908AS60ACFU
• Description: MC68HC908AZ60A, MC68HC908AS60A Hcmos Microcontroller Unit Technical Data
• Manufacturer: Motorola Semiconductor Products

Low Voltage Inhibit (LVI)
16.4 Functional Description
Technical Data
230
NOTE:
If a low voltage interrupt (LVI) occurs during programming of EEPROM
or Flash memory, then adequate programming time may not have been
allowed to ensure the integrity and retention of the data. It is the
responsibility of the user to ensure that in the event of an LVI any
addresses being programmed receive specification programming
conditions.
Figure 16-1
out of reset. The LVI module contains a bandgap reference circuit and
comparator. The LVI power bit, LVIPWR, enables the LVI to monitor V
voltage. The LVI reset bit, LVIRST, enables the LVI module to generate
a reset when V
below that level for nine or more consecutive CPU cycles.
Note that short V
responsibility to ensure a clean V
voltage range if normal microcontroller operation is to be guaranteed.
LVISTOP, enables the LVI module during stop mode. This will ensure
when the STOP instruction is implemented, the LVI will continue to
monitor the voltage level on V
in the configuration register, CONFIG-1 (see
(CONFIG-1)
Once an LVI reset occurs, the MCU remains in reset until V
above a voltage, LVI
CPU cycle to bring the MCU out of reset (see
on page 232). The output of the comparator controls the state of the
LVIOUT flag in the LVI status register (LVISR).
An LVI reset also drives the RST pin low to provide low-voltage
protection to external peripheral devices.
shows the structure of the LVI module. The LVI is enabled
on page 197).
Low Voltage Inhibit (LVI)
DD
DD
falls below a voltage, LVI
spikes may not trip the LVI. It is the user’s
TRIPR
. V
DD
DD
must be above LVI
. LVIPWR, LVISTOP, and LVIRST are
DD
signal within the specified operating
TRIPF
Configuration Register
Forced Reset Operation
MC68HC908AZ60A — Rev 2.0
, and remains at or
TRIPR
for only one
DD
MOTOROLA
rises
DD