XC908AS60ACFU Motorola Semiconductor Products, XC908AS60ACFU Datasheet - Page 459

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XC908AS60ACFU

Manufacturer Part Number
XC908AS60ACFU
Description
MC68HC908AZ60A, MC68HC908AS60A Hcmos Microcontroller Unit Technical Data
Manufacturer
Motorola Semiconductor Products
Datasheet
25.9.2 TIMA Counter Registers
MC68HC908AZ60A — Rev 2.0
MOTOROLA
NOTE:
NOTE:
Setting the TSTOP and TRST bits simultaneously stops the TIMA
counter at a value of $0000.
PS[2:0] — Prescaler Select Bits
The two read-only TIMA counter registers contain the high and low bytes
of the value in the TIMA counter. Reading the high byte (TACNTH)
latches the contents of the low byte (TACNTL) into a buffer. Subsequent
reads of TACNTH do not affect the latched TACNTL value until TACNTL
is read. Reset clears the TIMA counter registers. Setting the TIMA reset
bit (TRST) also clears the TIMA counter registers.
If TACNTH is read during a break interrupt, be sure to unlatch TACNTL
by reading TACNTL before exiting the break interrupt. Otherwise,
TACNTL retains the value latched during the break.
These read/write bits select either the PTD6/ATD14/TACLK pin or
one of the seven prescaler outputs as the input to the TIMA counter
as
Table 25-1
Timer Interface Module A (TIMA)
PS[2:0]
000
001
010
100
101
011
110
111
shows. Reset clears the PS[2:0] bits.
Table 25-1. Prescaler Selection
Internal Bus Clock ÷ 16
Internal Bus Clock ÷ 32
Internal Bus Clock ÷ 64
Internal Bus Clock ÷ 4
Internal Bus Clock ÷ 2
Internal Bus Clock ÷ 8
Internal Bus Clock ÷ 1
PTD6/ATD14/TACLK
TIMA Clock Source
Timer Interface Module A (TIMA)
Technical Data
I/O Registers
459

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