XC908AS60ACFU Motorola Semiconductor Products, XC908AS60ACFU Datasheet - Page 490
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XC908AS60ACFU
Manufacturer Part Number
XC908AS60ACFU
Description
MC68HC908AZ60A, MC68HC908AS60A Hcmos Microcontroller Unit Technical Data
Manufacturer
Motorola Semiconductor Products
Datasheet
1.XC908AS60ACFU.pdf
(576 pages)
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Byte Data Link Controller (BDLC)
27.5 BDLC MUX Interface
27.5.1 Rx Digital Filter
Technical Data
490
impedance. This allows the communication path through the analog
transceiver to be tested without interfering with network activity. Using
the BDLC analog loopback mode in conjunction with the analog
transceiver’s loopback mode ensures that, once the off-chip analog
transceiver has exited loopback mode, the BCLD will not begin
communicating before a known condition exists on the J1850 bus.
The MUX interface is responsible for bit encoding/decoding and digital
noise filtering between the protocol handler and the physical interface.
The receiver section of the BDLC includes a digital low pass filter to
remove narrow noise pulses from the incoming message. An outline of
the digital filter is shown in
Byte Data Link Controller (BDLC)
Figure 27-3. BDLC Block Diagram
Figure
PHYSICAL INTERFACE
PROTOCOL HANDLER
MUX INTERFACE
CPU INTERFACE
TO J1850 BUS
TO CPU
27-4.
MC68HC908AZ60A — Rev 2.0
BDLC
MOTOROLA
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