XC908AS60ACFU Motorola Semiconductor Products, XC908AS60ACFU Datasheet - Page 338

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XC908AS60ACFU

Manufacturer Part Number
XC908AS60ACFU
Description
MC68HC908AZ60A, MC68HC908AS60A Hcmos Microcontroller Unit Technical Data
Manufacturer
Motorola Semiconductor Products
Datasheet
Timer Interface Module B (TIMB)
Technical Data
338
NOTE:
MSxA — Mode Select Bit A
Before changing a channel function by writing to the MSxB or MSxA bit,
set the TSTOP and TRST bits in the TIMB status and control register
(TBSC).
ELSxB and ELSxA — Edge/Level Select Bits
When ELSxB:A ≠ 00, this read/write bit selects either input capture
operation or unbuffered output compare/PWM operation (see
20-2).
When ELSxB:A = 00, this read/write bit selects the initial output level
of the TBCHx pin once PWM, input capture or output compare
operation is enabled (see
When channel x is an input capture channel, these read/write bits
control the active edge-sensing logic on channel x.
When channel x is an output compare channel, ELSxB and ELSxA
control the channel x output behavior when an output compare
occurs.
When ELSxB and ELSxA are both clear, channel x is not connected
to port F and pin PTFx/TBCHx is available as a general-purpose I/O
pin. However, channel x is at a state determined by these bits and
becomes transparent to the respective pin when PWM, input capture,
or output compare mode is enabled.
and ELSxA work. Reset clears the ELSxB and ELSxA bits.
1 = Unbuffered output compare/PWM operation
0 = Input capture operation
1 = Initial output level low
0 = Initial output level high
Timer Interface Module B (TIMB)
Table
20-2). Reset clears the MSxA bit.
Table 20-2
MC68HC908AZ60A — Rev 2.0
shows how ELSxB
MOTOROLA
Table

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