XC908AS60ACFU Motorola Semiconductor Products, XC908AS60ACFU Datasheet - Page 497

• Manufacturer Part Number: XC908AS60ACFU
• Description: MC68HC908AZ60A, MC68HC908AS60A Hcmos Microcontroller Unit Technical Data
• Manufacturer: Motorola Semiconductor Products

MC68HC908AZ60A — Rev 2.0
MOTOROLA
(t
previous bit. The start-of-frame (SOF), end-of-data (EOD), end-of-frame
(EOF), and inter-frame separation (IFS) symbols always will be encoded
at an assigned level and length. See
Each message will begin with an SOF symbol an active symbol and,
therefore, each data byte (including the CRC byte) will begin with a
passive bit, regardless of whether it is a logic 1 or a logic 0.
All VPW bit lengths stated in the following descriptions are typical values
at a 10.4 kbps bit rate.
Logic 0
NOM
A logic 0 is defined as either:
See
– An active-to-passive transition followed by a passive period
– A passive-to-active transition followed by an active period
at 10.4 kbps baud rate), depending upon the encoding of the
Figure
64 µs in length, or
128 µs in length
Byte Data Link Controller (BDLC)
27-6(a).
Figure
Byte Data Link Controller (BDLC)
27-6.
BDLC MUX Interface
Technical Data
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