MT90225AG Zarlink Semiconductor, MT90225AG Datasheet - Page 29
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MT90225AG
Manufacturer Part Number
MT90225AG
Description
Description = 16 Port TC PHY For T1, E1 And DSL ;; Package Type = N/a ;; No. Of Pins =
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT90225AG.pdf
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Data Sheet
This mode is selected in TDM TX Link Control (0x0600-0x060F) and TDM RX Link Control (0x0700-0x070F) by
the following settings.
4.1.3 Single mode -ST-BUS
This is used for T1/E1 connection with ST-BUS, where data rate is 2.048 Mb/s, clock is 4.096 MHz and frame pulse
is 8KHz. A standard ST-BUS mode is supported with 32 time slots in each frame. The Frame format and clock speed
meet the ST-BUS or MVIP standard. The mapping registers are used to determine which of the 32 time slots are
used to carry TDM traffic.
Note: Frame pulse polarity and clock edge are fixed in ST-BUS mode.
Note: Both frame pulse polarity and clock edge are programmable.
Data rate (bits 6:5) = 01
Multiplex mode (bits 4:3) = 00
Clock and Sync format (bit 2) = 0
Cell delineation mode (bit 10 of TDM RX Link Control only) = 0
RXSYNC
Serial Bit
Stream
TXCK
RXCK
ST-BUS
Bit Cells
(DSTx0-15)
TXSYNC
ST-BUS
Bit Cells
(DSTx0-15)
Serial Bit
Stream
TXSYNC
RXSYNC
TXCK
RXCK
Channel 31 bit 0
Channel 31 bit 0
Bit Cell
Bit Cell
Figure 9 - Single mode - Generic 2.048 MHz
Figure 10 - Single mode - ST-BUS
Channel 0 bit 7
Channel 0 bit 7
Bit Cell
Zarlink Semiconductor Inc.
Bit Cell
...
...
...
...
...
...
...
...
...
...
Channel 0 bit 0
Channel 0 bit 0
Bit Cell
Bit Cell
Channel 1 bit 7
Channel 1 bit 7
Bit Cell
Bit Cell
...
...
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...
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