MT90225AG Zarlink Semiconductor, MT90225AG Datasheet - Page 46

• Manufacturer Part Number: MT90225AG
• Description: Description = 16 Port TC PHY For T1, E1 And DSL ;; Package Type = N/a ;; No. Of Pins =
• Manufacturer: Zarlink Semiconductor

46
Address (Hex):
Direct access
Reset Value (Bin):
Address (Hex):
Direct access
Reset Value (Hex):
Address (Hex):
Direct access
Reset Value (Hex):
15:12
Bit #
15:13
7-0
7:0
Bit #
15
14
13
12
11
10
12:8
11
10
9
8
9
8
Type
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
Type
R/W
R
Reserved.
Reserved. Write 0 for normal operation.
Reserved. Write 0 for normal operation.
Reserved. Write 0 for normal operation.
16/8-bit mode selection bit for the RX UTOPIA data bus. When set the RX UTOPIA
interface is operating in 8-bit mode, when reset it is operating in 16-bit mode.
Reserved. Write 0 for normal operation.
Reset UTOPIA RX state machines when set to 1.
Reserved. Write 0 for normal operation.
Reserved. Write 0 for normal operation.
Unused. Read all 0’s.
Reserved. Write 0 for normal operation.
Reserved. Write 0 for normal operation.
Write 0 for normal operation, 1 to tristate parity.
Parity Bit. EVEN parity is selected when this bit is set.
ODD parity is selected when this bit is cleared.
User Defined Byte. This byte is inserted into the sixth byte of the header when cells are
being output in 16-bit mode.
Unused. Read all 0’s.
UTOPIA PHY Address of Link N+8.
0x0040-0x0047 (8 reg)
1 register per 2 links. Link 0 is paired with link 8, link 1 with link 9 and so on
0000
0x0011 (1 reg)
X000000000000000
0x0012 (1 reg)
sixth byte of the header when operating in sixteen-bit mode.
1 register which contains the User Defined Byte. This byte is inserted into the
0000
Table 7 - UTOPIA Input Link Address Registers
Table 6 - UTOPIA Output User Defined Byte
Table 5 - UTOPIA Output Control Register
Zarlink Semiconductor Inc.
Description
Description
Description
Data Sheet