MT90225AG Zarlink Semiconductor, MT90225AG Datasheet - Page 66

no-image

MT90225AG

Manufacturer Part Number
MT90225AG
Description
Description = 16 Port TC PHY For T1, E1 And DSL ;; Package Type = N/a ;; No. Of Pins =
Manufacturer
Zarlink Semiconductor
Datasheet
66
ATM LAYER
UTOPIA
BUS
Dejittered TX CLK
BUS
2.048 MHz)
(1.544 or
Transmit Clock Dejittering
Figure 17 - MT90225 interfacing MT9076 Generic mode with asynchronous links.
MT90225
PLLREF0-1
REFCK0-3
Function
MT9042
TXSYNCo[15]
RXSYNCi[15]
TXSYNCo[1]
TXSYNCo[0]
RXSYNC[1]
RXSYNC[0]
RXCKi[15]
TXCKi[15]
(each link has independent Tx and Rx clocks)
DSTo[15]
RXCKi[1]
RXCKi[0]
TXCKi[1]
TXCKi[0]
DSTi[15]
DSTo[1]
DSTo[0]
DSTi[1]
DSTi[0]
MT9076B in IMA mode.
MT9042 PLL is optional.
TxCK[i] is sourced from RxCK[i] or REFCK[j]
8 kHz [T7]
8 kHz [R7]
Zarlink Semiconductor Inc.
8 kHz [T7]
8 kHz [R7]
8 kHz [T7]
8 kHz [R7]
External
Source
TDM Data
TDM Data
TDM Data
1.544 or 2.048 MHz
1.544 or 2.048 MHz
1.544 or 2.048 MHz
1.544 or 2.048 MHz
1.544 or 2.048 MHz
1.544 or 2.048 MHz
MT9076B #15
MT9076B #1
MT9076B #2
DSTi
DSTo
C4
FP
ExCLK
RxFP
DSTi
DSTo
C4
FP
ExCLK
RxFP
DSTi
DSTo
C4
FP
ExCLK
RxFP
at 1.5 or 2 Mbps
Legacy Trunks
at 1.5 or 2 Mbps
Legacy Trunks
Legacy Trunks
at 1.5 or 2 Mbps
Data Sheet

Related parts for MT90225AG