ADP315PC87570 National Semiconductor, ADP315PC87570 Datasheet - Page 21
ADP315PC87570
Manufacturer Part Number
ADP315PC87570
Description
Keyboard and Power Management Controller
Manufacturer
National Semiconductor
Datasheet
1.ADP315PC87570.pdf
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2.2 SIGNAL/PIN DESCRIPTIONS
Refer to Table 2-2 for an alphabetical listing of all PC87570 signals and pins, as well as brief descriptions. The following
abbreviations are used in the Type column in this table.
TTL
CMOSS
STRAP
CM
CMHD1
CMHD2
OD
OD2
PU
OSCIN
OSCOUT
ANIN
ANOUT
32KCLKIN
32KX1
32KX2
A18-0
AD7-0
AGND
AV
BE1,0
BST2-0
CBRD
CC
Signal
Symbol
Description
Input, TTL compatible
Input, CMOS with Schmidt Trigger
Input with Schmidt characteristics and an internal
pull-down resistor, typically used for strap signals
Output, CMOS buffer
Output, CMOS buffer with high drive type 1
Output, CMOS buffer with high drive type 2
Output, Open-Drain
Output, Open-Drain with high drive type 2
Weak pull-up capability (on input or output pin)
Oscillator input [not characterized]
Oscillator output [not characterized]
Analog input signal
Analog output signal
118, 117
122-104
160-pin
84, 83,
80-75
92-94
119
23
23
25
82
81
Pin Number
136, 135,
128, 127
130-114
102-104
176-pin
95, 94,
86-81
129
25
25
27
92
91
Signal/Pin Connection and Description
TTL
OSCIN
-
-
ANIN
N/A
N/A
-
-
-
Table 2-2. PC87570 Signals
Table 2-1. Type Symbols
Input
Buffer Type
21
-
OSCOUT
CM
-
N/A
N/A
CM
CM
CM
Output
32.768 KHz Oscillator Clock Input..
32.768 KHz Crystal Interface, input to oscillator.
32.768 KHz Crystal Oscillator Interface output
to crystal. See Figure 6-1 on page 65.
Address A18 through A0. CR16A address to
external memory. A16-A17 should not be pulled
up during power-up since include special test
features.
Analog Inputs of the A/D converter
Analog Ground, for ADC and DAC.
Analog 5V or 3.3V power supply.
Byte Enable bits 1 and 0 on monitor bus cycles.
Bus Status bits 2-0 on monitor bus cycles.
When in DEV environment, these pins allows
monitoring of the external bus cycles. When
BCFG.OBR is also set, the internal bus cycles
are also visible outside. See also Table 2-5 on
page 27.
Core Bus Read Status on monitor bus cycles.
Available in all modes. See Table 2-5 on
page 27.
DC Characteristics
See Table 19-7 on page 135.
See Table 19-7 on page 135.
See Table 19-7 on page 135.
See Table 19-7 on page 135.
See Table 19-7 on page 135.
See Table 19-7 on page 135.
See Table 19-7 on page 135.
See Table 19-7 on page 135.
See Table 19-7 on page 135.
See Table 19-5 on page 134.
See Table 19-6 on page 134.
Function
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