ADP315PC87570 National Semiconductor, ADP315PC87570 Datasheet - Page 23

• Manufacturer Part Number: ADP315PC87570
• Description: Keyboard and Power Management Controller
• Manufacturer: National Semiconductor

HIOW
HMEMCS
HMEMRD
HMEMWR
HMR
HPWRON
HRMS
HRSTO
IRQ1
IRQ8
IRQ11
IRQ12
ISE
Signal
160-pin
145
143
148
149
150
151
142
141
140
139
95
71
89
Pin Number
176-pin
159
157
162
163
164
165
105
156
155
154
153
77
99
Signal/Pin Connection and Description
TTL
TTL
TTL
TTL
CMOSS
CMOSS
STRAP
-
TTL
-
TTL
TTL
TTL
Input
Buffer Type
23
-
-
-
-
-
-
-
CM
CMHD2
OD2
OD2
CMHD2
OD2
CMHD2
OD2
-
Output
Host I/O Write. Active-low input that signals an
I/O data write by the host processor.
Host BIOS Memory Chip Select. This signal is
in use when the shared memory configuration is
enabled (SHBM=0). See pin “SHBM” below .
See also Table 2-5 on page 27.
Host Memory Read. Active-low input that sig-
nals a memory data read by the host processor.
This signal is in use when the shared memory
configuration is enabled (SHBM=0). See pin
“SHBM” below . See also Table 2-5 on page 27.
Host Memory Write. Active-low input that sig-
nals a memory data write by the host processor.
This signal is in use when the shared memory
configuration is enabled (SHBM=0). See pin
“SHBM” below . See also Table 2-5 on page 27.
For AC parameters, refer to Section 19.5.4 on
page 150.
Master Reset. A rising edge that resets the
PC87570. See details at Section 2.3.4 on page
26.
Host Power On. Indicates that the host power
supply is on, and the host bus interface signals
are valid. While HPWRON is low, the host
inputs are ignored, and all outputs are either
floating or driven low. See Section 5.11.2 on
page 53.
Host Reset Mode Select, strap pin. When pulled
high during power-up reset, enables sending
reset event to the Host processor when the
shared BIOS is accessed while the PC87570 is
not in Active mode, or the MCFG.SHOFF or
MCFG.SHMEN are 0. When low, the host
access is extended until the PC87570 com-
pletes its execution.
Host Reset Output
Interrupt 1. Active-high output to signal a key-
board interrupt. This bit is set when the KBC
port output buffer is full with data to the key-
board driver.
Interrupt 8. Active-low output that Indicates an
RTC interrupt.
Interrupt 11. Active-high output that indicates an
output buffer full in the Power Management port
of the Host I/F.
Interrupt 12. Active-high output that indicates a
mouse interrupt. This bit is set when the KBC
port output buffer is full with data for the mouse
driver.
ISE Interrupt. Reserved for use by the develop-
ment system.
Function
www.national.com