ep3c120f780c8nes Altera Corporation, ep3c120f780c8nes Datasheet - Page 303

• Manufacturer Part Number: ep3c120f780c8nes
• Description: Cyclone Iii Device Family
• Manufacturer: Altera Corporation

Altera Corporation-Preliminary
March 2007
problems. Ensure that the DCLK and DATA lines are buffered. All devices
initialize and enter user mode at the same time because all device
CONF_DONE pins are tied together.
All nSTATUS and CONF_DONE pins are tied together and if any device
detects an error, configuration stops for the entire chain and the entire
chain must be reconfigured. For example, if the first device flags an error
on nSTATUS, it resets the chain by pulling its nSTATUS pin low. This
behavior is similar to a single device detecting an error.
If the Auto-restart configuration after error option is turned on, the
devices release their nSTATUS pins after a reset time-out period
(maximum of 80 µs). After all nSTATUS pins are released and pulled high,
the MAX II device can try to reconfigure the chain without pulsing
nCONFIG low. If this option is turned off, the MAX II device must
generate a low-to-high transition (with a low pulse of at least 500 µs) on
nCONFIG to restart the configuration process.
If a system has multiple devices that contain the same configuration data,
tie all device nCE inputs to GND, and leave nCEO pins floating. All other
configuration pins (nCONFIG, nSTATUS, DCLK, DATA[7..0], and
CONF_DONE) are connected to every device in the chain. Configuration
signals may require buffering to ensure signal integrity and prevent clock
skew problems. Ensure that the DCLK and DATA lines are buffered.
Devices must be the same density and package. All devices start and
complete configuration at the same time.
device FPP configuration when both Cyclone III devices are receiving the
same configuration data.
Cyclone III Device Handbook, Volume 1
Fast Passive Parallel Configuration
Figure 10–22
shows multi-
10–67