ep3c120f780c8nes Altera Corporation, ep3c120f780c8nes Datasheet - Page 74

• Manufacturer Part Number: ep3c120f780c8nes
• Description: Cyclone Iii Device Family
• Manufacturer: Altera Corporation

Memory Blocks in Cyclone III Devices
4–20
Cyclone III Device Handbook, Volume 1
Input/Output Clock Mode
Cyclone III M9K memory blocks can implement input/output clock
mode for FIFO, single-port, true, and simple dual-port memories. In this
mode, an input clock controls all input registers to the memory block
including data, address, byte enables, write enables and also read-enable
registers. An output clock controls the data-output registers. Each
memory block port also supports independent clock enables for input
and output registers.
Figures
clock mode for true dual-port, simple dual-port, and single-port modes,
respectively.
4–15, 4–16, and
4–17
show the memory block in input/output
Altera Corporation-Preliminary
March 2007