ep3c120f780c8nes Altera Corporation, ep3c120f780c8nes Datasheet - Page 450

• Manufacturer Part Number: ep3c120f780c8nes
• Description: Cyclone Iii Device Family
• Manufacturer: Altera Corporation

I/O Timing
1–40
Cyclone III Handbook
Notes to
(1)
(2)
(3)
(4)
1.5
V_DIFFERENTIAL_HSTL
_CLASS_II
1.2
V_DIFFERENTIAL_HSTL
_CLASS_I
1.2
V_DIFFERENTIAL_HSTL
_CLASS_II
LVPECL
LVDS
3.3-V LVTTL
3.3V LVCMOS
3.0-V LVTTL
Table 1–43. Maximum Input Clock Toggle Rate on Cyclone III Devices (Part 3 of 3)
Table 1–44. Maximum Output Clock Toggle Rate on Cyclone III Devices (Part 1 of 5)
Current version of Quartus II does not have the information for the standard.
The 1.2 V_HSTL_CLASS_II is only supported on column I/O pins.
Input differential standard is only supported on GCLK pin.
Input LVPECL is only supported on GCLK pin.
I/O Standard
I/O Standard
Table
1–43:
Current Strength
or OCT Setting
Speed
Grade
402
(3)
(3)
(3)
(4)
-6
12 mA
16 mA
4 mA
8 mA
2 mA
4 mA
8 mA
Column I/O Pins
Maximum Input Clock Toggle Rate on Cyclone III Devices (MHz)
Speed
Grade
402
(3)
(3)
(3)
(4)
-7
Speed
Grade
Speed
Grade
120
200
(1)
(1)
(1)
(1)
(1)
-6
402
(3)
(3)
(3)
(4)
-8
Column I/O Pins
Maximum Output Clock Toggle Rate on Cyclone III Devices (MHz)
Speed
Grade
100
170
Speed
Grade
(1)
(1)
(1)
(1)
(1)
-7
402
(3)
(3)
(3)
(4)
-6
Row I/O Pins
Speed
Grade
140
Speed
Grade
80
(1)
(1)
(1)
(1)
(1)
-8
402
(3)
(3)
(3)
(4)
-7
Speed
Grade
120
200
Speed
(1)
(1)
(1)
(1)
(1)
Grade
-6
402
(3)
(3)
(3)
(4)
Altera Corporation- Preliminary
-8
Row I/O Pins
Speed
Grade
100
170
(1)
(1)
(1)
(1)
(1)
-7
Speed
Grade
Dedicated Clock Inputs
500
402
402
(1)
(1)
-6
Speed
Grade
140
(1)
(1)
(1)
(1)
(1)
80
-8
Speed
Grade
500
402
402
Preliminary
(1)
(1)
-7
March 2007
Dedicated Clock Outputs
Speed
Grade
120
200
(1)
(1)
(1)
(1)
(1)
-6
Speed
Grade
500
402
402
(1)
(1)
-8
Speed
Grade
100
170
Preliminary
(1)
(1)
(1)
(1)
(1)
-7
Speed
Grade
140
80
(1)
(1)
(1)
(1)
(1)
-8