ade7854 Analog Devices, Inc., ade7854 Datasheet - Page 16

• Manufacturer Part Number: ade7854
• Description: Poly Phase Multifunction Energy Metering Ic With Neutral Current Measurement
• Manufacturer: Analog Devices, Inc.

ADE7854
POWER MANAGEMENT
The ADE7854 has two modes of operation, determined by the
state of PM1 pin (see Table 7). This pin provides a complete
control of ADE7854 operation and could easily be connected to
an external microprocessor I/O. PM1 pin has internal pull up
resistors. Table 8 presents all characteristics of the power
modes.
Table 9 presents actions that are recommended before and after
setting a new power mode.
Table 7. ADE7854 Power Supply Modes
Power Supply Modes
PSM0 – normal power mode
PSM3 – sleep mode
PSM0 – Normal Power Mode
In this mode, the ADE7854 is fully functional. The PM1 pin is
set to low for the ADE7854 to enter this mode.
If the ADE7854 is in PSM3 mode and is switched into PSM0
mode, then all control registers take the default values. The
ADE7854 signals the end of the transition period by triggering
STATUS1[31:0] register to 1. This bit is 0 during the transition
period and becomes 1 when the transition is finished. The
status bit is cleared and
IRQ interrupt pin low and setting bit 15 (RSTDONE) in
Powered UP
ADE7854
1
0V
2.0V+/-10%
3.3V-10%
IRQ pin is set back high by writing
1
POR timer
turned ON
26msec
PM1
0
1
Figure 9. ADE7854 power up procedure
enters PSM3
ADE7854
Rev. PrC| Page 16 of 71
STATUS1[31:0] register with the corresponding bit set to 1. The
bit 15 (RSTDONE) in interrupt mask register does not have any
functionality attached even if
(RSTDONE) in STATUS1[31:0] is set to 1. This makes
RSTDONE interrupt unmaskable.
PSM3 – Sleep Mode
In this mode, the ADE7854 has most of its internal circuits
turned off. The current consumption is the lowest. The I
HSDC or SPI ports are not functional during this mode. The
pins
set high.
Power Up Procedure
The ADE7854 contains an on-chip power supply monitor that
supervises the power supply VDD. At power up, until VDD
reaches 2V ± 10%, the chip is in an inactive state. As VDD
crosses this threshold, the power supply monitor keeps the chip
in this inactive state for 26msec more, allowing VDD to achieve
3.3V-10%, the minimum recommended supply voltage. As PM1
pin has an internal pull up resistor and the external
microprocessor keeps it high, the ADE7854 always powers up
in sleep mode PSM3. Then, an external circuit (i.e.
microprocessor) sets PM1 pin to low level, allowing the
ADE7854 to enter normal mode PSM0. The passage from
PSM3 mode in which most of the internal circuitry is turned off
to PSM0 mode in which all functionality is enabled is done in
less than 40msec. See Figure 9 for details.
Microprocessor
sets ADE7854
RESET
in PSM0
, SCLK/SCL, MOSI/SDA and SS /HAS should be
40msec
Preliminary Technical Data
RSTDONE
triggered
interrupt
IRQ pin goes low when bit 15
1
Microprocessor
choice between
I2C and SPI
makes the
PSM0 ready
ADE7854
2
C,