ade7854 Analog Devices, Inc., ade7854 Datasheet - Page 59

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ade7854

Manufacturer Part Number
ade7854
Description
Poly Phase Multifunction Energy Metering Ic With Neutral Current Measurement
Manufacturer
Analog Devices, Inc.
Datasheet

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Preliminary Technical Data
Address
0xE611
0xE612
0xE613
0xE614
0xE615
0xE616
0xE617
0xE618
0xE700
0xE701
0xE702
0xE703
0xE704
0xE705
0xE706
0xEBFF
0xEC00
0xEC01
1
2
3
W=write
32 SE=24-bit signed register that is transmitted as a 32-bit word sign extended to 32 bits
16 ZP=10-bit unsigned register that is transmitted as a 16-bit word with 6 most significant bits padded with 0s
R=read
32 ZP=24 or 20-bit signed or unsigned register that is transmitted as a 32-bit word with 8 or respectively 12 most significant bits padded with 0s
U=unsigned, S=signed
CF1DEN
CF2DEN
CF3DEN
ACCMODE
LCYCMODE
SAGCYC
CONFIG2
Name
APHCAL
BPHCAL
CPHCAL
PHSIGN
CONFIG
MMODE
PEAKCYC
CFCYC
HSDC_CFG
reserved
Reserved
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
1
Bit
Length
16
16
16
10
10
10
16
16
8
8
8
8
8
8
8
8
16 ZP
16
8
8
8
8
8
8
Bit Length
during
comm
16
16
16
16 ZP
16 ZP
16
8
8
2
Rev. PrC| Page 59 of 71
Type
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
3
Default
Value
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
NA
0x0000
0x16
0x00
0x78
0x00
0x00
0x01
0x00
0x00
Phase calibration of phase A. (Table 35 ).
Phase calibration of phase C. (Table 35)
Power sign register. (Table 36)
ADE7854 configuration register. (Table 37)
Accumulation mode register. (Table 39)
Line accumulation mode behavior. (Table 40).
Peak detection half line cycles
Sag detection half line cycles
HSDC configuration register.(Table 41)
Second configuration register. (Table 42)
Description
CF1 denominator
CF2 denominator
CF3 denominator
Phase calibration of phase B. (Table 35 )
Measurement mode register. (Table 38)
Number of CF pulses between two consecutive
energy latches. See Synchronizing energy registers
with CFx outputs section
This address may be used in manipulating the
Serial Interfaces chapter for details)
This address should not be written for proper
operation
SS
pin when SPI is chosen as the active port. (See
ADE7854

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