peb2035 ETC-unknow, peb2035 Datasheet - Page 107
peb2035
Manufacturer Part Number
peb2035
Description
Communications Advanced Cmos Frame Aligner
Manufacturer
ETC-unknow
Datasheet
1.PEB2035.pdf
(134 pages)
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FS/DL Mask Register (WRITE)
FMR
SM24 ... Shift CCS Marker
FM5 ... FM0 ... FS/DL Mask Bits
Semiconductor Group
0 ... output signals RSIGM and XSIGM mark channel 24,
1 ... output signals RSIGM and XSIGM mark channel 17.
0 ... the assigned data is taken from port XDI,
1 ... the assigned data is taken from the register XFDL.
In CAS-BR mode, the contents are shifted out in the corresponding bit locations to the
remote end:
XS7: transmit channel 1, 9, 17
XS6: transmit channel 2, 10, 18
XS5: transmit channel 3, 11, 19
XS4: transmit channel 4, 12, 20
XS3: transmit channel 5, 13, 21
XS2: transmit channel 6, 14, 22
XS1: transmit channel 7, 15, 23
XS0: transmit channel 8, 16, 24
If request XREQ is ignored, transmission of the third byte will be repeated until a new
information is written to the stack. Although the DMA slip indication RSP.DSLP has been
set, function of stack RSIG is unchanged. The function simplifies realization of HDLC
procedures via microprocessor interface (idle code transmission etc.).
If CCS/CAS-CC mode (MODE.SIGM = 0) and channel translation mode 1 (MODE.CTM = 1)
are enabled:
Only significant in F4, ESF and F72 format.
These bits enable a mixed insertion of the corresponding FS/DL bits of register XFDL and
the information from the system internal highway at port XDI:
7
1
SM24 FM5
107
FM0
0
PEB 2035
(0B)