peb2035 ETC-unknow, peb2035 Datasheet - Page 55

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peb2035

Manufacturer Part Number
peb2035
Description
Communications Advanced Cmos Frame Aligner
Manufacturer
ETC-unknow
Datasheet

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Interface to Signaling Controller
Semiconductor Group
SCLK
SYPQ
RDO
XDI
RSIGM
XSIGM
RREQ
XREQ
ACKNLQ I
XSIG
RMFB
XMFB
FREEZS O
I
I
O
I
O
O
O
I
O
O
O
as above
as above
as above
as above
Receive Signaling Marker
It marks all signaling bits on RDO.
Transmit Signaling Marker
It marks all signaling bits on XDI.
Receive DMA/Interrupt Request
Enabled via bit XC0.ISIG. It requires read access to the internal Receive
Signaling Stack RSIG.
Transmit DMA/Interrupt Request
Enabled via bit XC0.ISIG. It requires write access to the internal Transmit
Signaling Stack XSIG.
DMA/Interrupt Acknowledge
Enabled via bit XC0.ISIG. This input acts as access enable to the
signaling stacks for I/O-to-memory DMA applications.
PCM 24: Transmit Signaling Data
Additional system internal transmit highway input for signaling data. Used
if the switching network circuits are not able to tri-state their outputs.
Normally, this will be used for CAS-BR applications.
PCM 24: Receive Multiframe Begin
It marks the beginning of every received multiframe on RDO. Additional
pulses every twelve frames are provided in ESF and F72 format to enable
easy access to FS/DL information which may be used for synchronizing
an external controller. Generation of these additional pulses can be
disabled via bit ACR.MFBS. For interrupt applications, the internal status
bits MFR.RRS and MFR.RMB may be used in conjunction with the
acknowledge bit XFDL.RMAK.
PCM 24: Transmit Multiframe Begin
Its function is equivalent to RMFB for the transmit direction. Associated
bits: MFR.XRS, MFR.XMB, XFDL.XMAK and also ACR.MFBS.
PCM 24: Freeze Signaling
Synchronization status signal which informs the signaling controller that
current signaling should be frozen.
55
PEB 2035

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