peb2035 ETC-unknow, peb2035 Datasheet - Page 68

• Manufacturer Part Number: peb2035
• Description: Communications Advanced Cmos Frame Aligner
• Manufacturer: ETC-unknow

Transparent Mode
The described transparent modes are useful for loopback via the system interface.
PCM 30 Mode
In receive direction, transparency for decoded dual rail data or single rail unipolar data is always
achieved if the receiver is in the synchronous state. In asynchronous state the data can be
transparently switched through if bit EMOD.DAIS and bit EMOD.RTM are set. However, correct
time-slot assignment can not be guaranteed due missing frame alignment.
Transparency in transmit direction can be achieved by activating the time-slot 0 transparent mode
(bit XSP.TT0). All internal information of the ACFA (framing, CRC, Sn/Si bit signaling, remote alarm)
will be ignored. Only HDB3 data encoding is still provided. For complete transparency the internal
signaling stack XSIG has to be disabled.
PCM 24 Mode
Setting bit GCR.TM switches the ACFA in transparent mode:
In receive direction all bits in F-bit position of the incoming multiframe are forewarded to RDO and
inserted in the FS/DL time-slot. Bit RDCF (bit 1 of FS/DL time-slot) indicates a DL bit.
In transmit direction bit 8 of the FS/DL time-slot from the system internal highway (XDI) is inserted
in the F-bit position of the outgoing frame. For complete transparency the internal signaling stack
XSIG has to be disabled and ‘Clear Channels’ have to be defined via registers CCB1 … 3.
Note: For loop back via the system interface (RDO conn. with XDI/XSIG) Channel Translation
Semiconductor Group
Mode 0 (MODE.CTM = 0) has to be used to guarantee correct assignment of FS/DL bits to
the data of the frame.
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PEB 2035