n25q032 Numonyx, n25q032 Datasheet - Page 104

• Manufacturer Part Number: n25q032
• Description: 32-mbit 3 V, Multiple I/o, 4-kbyte Subsector Erase, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
• Manufacturer: Numonyx

9.2.16
9.2.17
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DQ0
DQ1
C
S
DQ0
DQ1
Read Lock Register (RDLR)
The Read Lock Register instructions is used to read the lock register content.
Apart form the parallelizing of the instruction code, the address and the output data on the
two pins DQ0 and DQ1, the instruction functionality is exactly the same as the Read Lock
Register (RDLR) instruction of the Extended SPI protocol, please refer to
Read Lock Register (RDLR)
Figure 60. Read Lock Register instruction and data-out sequence DIO-SPI
*Address bits A23 and A22 are “Don’t Care.”
Write to Lock Register (WRLR)
The Write to Lock Register (WRLR) instruction allows bits to be changed in the Lock
Registers. Before it can be accepted, a Write Enable (WREN) instruction must previously
have been executed.
Apart form the parallelizing of the instruction code, the address and the input data on the
two pins DQ0 and DQ1, the instruction functionality is exactly the same as the Write to Lock
Register (WRLR) instruction of the Extended SPI protocol, please refer to
Write to Lock Register (WRLR)
Figure 61. Write to Lock Register instruction sequence DIO-SPI
*Address bits A23 and A22 are “Don’t Care.”
C
S
0
Instruction
1
0
Instruction
2
1
2
3
23 21 19 17
22 20 18 16
3
4
23 21 19 17
22 20 18 16
4
for further details.
5
5
for further details.
6
6
7
24-Bit Address*
7
15 13 11 9
14 12 10 8
8
*24-bit Address
15 13 11 9
14 12 10 8
8
9 10 11
9 10 11
12 13 14 15
7
6
12 13 14 15
7
6
5
4
5
4
3
2
3
2
1
0
1
0
16 17 18 19
12 13 14 15
Lock R egister In
Lock Register Out
7
7
6
6
5
4
5
4
3
2
3
2
Section 9.1.25:
Section 9.1.26:
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1
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