n25q032 Numonyx, n25q032 Datasheet - Page 3

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n25q032

Manufacturer Part Number
n25q032
Description
32-mbit 3 V, Multiple I/o, 4-kbyte Subsector Erase, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
Manufacturer
Numonyx
Datasheet

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6
5.3
Volatile and Non Volatile Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
6.1
6.2
6.3
6.4
5.2.2
5.2.3
5.2.4
5.2.5
5.2.6
5.2.7
5.2.8
Quad SPI (QIO-SPI)Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
5.3.1
5.3.2
5.3.3
5.3.4
5.3.5
5.3.6
5.3.7
5.3.8
5.3.9
Legacy SPI Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
6.1.1
6.1.2
6.1.3
6.1.4
6.1.5
Non Volatile Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6.2.1
6.2.2
6.2.3
6.2.4
6.2.5
6.2.6
Volatile Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
6.3.1
6.3.2
6.3.3
Volatile Enhanced Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . 40
Dual Command Fast reading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Page programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Subsector Erase, Sector Erase and Bulk Erase . . . . . . . . . . . . . . . . . . 27
Polling during a Write, Program or Erase cycle . . . . . . . . . . . . . . . . . . . 27
Read and Modify registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Active Power and Standby Power modes . . . . . . . . . . . . . . . . . . . . . . . 27
HOLD (or Reset) condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Multiple Read Identification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Quad Command Fast reading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
QUAD Command Page programming . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Subsector Erase, Sector Erase and Bulk Erase . . . . . . . . . . . . . . . . . . 29
Polling during a Write, Program or Erase cycle . . . . . . . . . . . . . . . . . . . 29
Read and Modify registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Active Power and Standby Power modes . . . . . . . . . . . . . . . . . . . . . . . 30
HOLD (or Reset) condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
VPP pin Enhanced Supply Voltage feature . . . . . . . . . . . . . . . . . . . . . . 30
WIP bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
WEL bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Block Protect bits (BP2, BP1, BP0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
TB bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
SRWD bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Dummy clock cycle NV configuration bits (NVCR bits from 15 to 12) . . 36
XIP NV configuration bits (NVCR bits from 11 to 9) . . . . . . . . . . . . . . . . 37
Output Driver Strength NV configuration bits (NVCR bits from 8 to 6) . . 37
Hold (Reset) disable NV configuration bit (NVCR bit 4) . . . . . . . . . . . . 37
Quad Input NV configuration bit (NVCR bit 3) . . . . . . . . . . . . . . . . . . . . 37
Dual Input NV configuration bit (NVCR bit 2) . . . . . . . . . . . . . . . . . . . . . 37
Dummy clock cycle: VCR bits 7:4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
XIP Volatile Configuration bits (VCR bit 3) . . . . . . . . . . . . . . . . . . . . . . . 39
Wrap: VCR bits 1:0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
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