n25q032 Numonyx, n25q032 Datasheet - Page 60

• Manufacturer Part Number: n25q032
• Description: 32-mbit 3 V, Multiple I/o, 4-kbyte Subsector Erase, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
• Manufacturer: Numonyx

9.1.4
Note:
60/160
DQ0
DQ1
S
C
Read Serial Flash Discovery Parameter
The Read Serial Flash Discovery Parameter (RDSFDP) instruction allows reading the Serial
Flash Discovery Parameter area (SFDP).
This SFDP area is composed of 2048 read-only bytes containing operating characteristics
and vendor specific information. The SFDP area is factory programmed.
Data to be written to the SFDP area is in definition phase.
If the SFDP area is blank, the device is shipped with all the SFDP bytes at FFh. If only a
portion of the SFDP area is written to, the portion not used is shipped with bytes in erased
state (FFh).
The instruction sequence for RDSFDP has the same structure as that of a Fast Read
instruction. First, the device is selected by driving Chip Select (S) Low. Next, the 8-bit
instruction code (5Ah) and the 24-bit address are shifted in, followed by 8 dummy clock
cycles.
The bytes of SFDP content are shifted out on the Serial Data Output (DQ1) starting from the
specified address. Each bit is shifted out during the falling edge of Serial Clock (C). The
instruction sequence is shown here.
The Read SFDP instruction is terminated by driving Chip Select (S) High at any time during
data output.
Figure 13. Read Serial Flash Discovery Sequence
*Address bits A23 and A22 are “Don’t Care.”
DQ0
DQ1
S
C
0
7
32 33 34
6
1
High Impedance
Dummy cycles
2
5
Instruction
4
3
35
4
3
36 37 38 39 40 41 42 43 44 45 46
2
5
6
1
0
7
23
MSB
8
7
22 21
6
9 10
24-bit address*
5
DATA OUT 1
4
3
28 29 30 31
3
2
2
1
1
0
0
47
MSB
7
6
5
DATA OUT 2
4
3
2
1
0
MSB
7