n25q032 Numonyx, n25q032 Datasheet - Page 145

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n25q032

Manufacturer Part Number
n25q032
Description
32-mbit 3 V, Multiple I/o, 4-kbyte Subsector Erase, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
Manufacturer
Numonyx
Datasheet

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Table 31.
1. tCH + tCL must be greater than or equal to 1/ fC.
2. Typical values given for TA = 25 °C
3. Value guaranteed by characterization, not 100% tested in production.
4. Expressed as a slew-rate.
5. Only applicable as a constraint for a WRSR instruction when SRWD is set to '1'.
6. VPPH should be kept at a valid level until the program or erase operation has completed and its result (success or failure)
7. When using the page program (PP) instruction to program consecutive bytes, optimized timings are obtained with one
8. int(A) corresponds to the upper integer part of A. For example int(12/8) = 2, int(32/8) = 4 int(15.3) =16.
tVPPHSL
tW
tCFSR
tWNVCR
tWVCR
tWRVECR
tPP
tSSE
tSE
tBE
Symbol
is known.
sequence including all the bytes versus several sequences of only a few bytes (1 < n < 256).
(7)
(6)
AC Characteristics (page 2 of 2)
Alt.
Enhanced program supply voltage High
(VPPH) to Chip Select Low for Single and
Dual I/O Page Program
Write status register cycle time
Clear flag status register cycle time
Write non volatile configuration register
cycle time
Write volatile configuration register cycle
time
Write volatile enhanced
configurationregister cycle time
Page Program Cycle Time (256 Bytes)
Page Program Cycle Time (n Bytes)
Page Program Cycle Time Vpp=VPPH (256
Bytes)
Program OTP cycle time (64 bytes)
Subsector erase cycle time
Sector Erase Cycle Time
Sector Erase Cycle Time Vpp=VPPH
Bulk erase cycle time
Bulk erase cycle time (with VPP=VPPH)
Parameter
200
Min
1.3
40
0.2
40
40
0.5
0.015
0.4
0.2
0.3
0.7
0.6
30
25
int(n/8) ×
Typ
(8)
(2)
8
3
5
5
5
3
3
3
60
60
Max
145/160
Unit
ms
ms
ms
ns
ns
ns
ns
s
s
s
s
s

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