n25q032 Numonyx, n25q032 Datasheet - Page 128
n25q032
Manufacturer Part Number
n25q032
Description
32-mbit 3 V, Multiple I/o, 4-kbyte Subsector Erase, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
Manufacturer
Numonyx
Datasheet
1.N25Q032.pdf
(160 pages)
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9.3.19
9.3.20
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Clear Flag Status Register
The Clear Flag Status Register (CLFSR) instruction reset the error Flag Status Register bits
(Erase Error bit, Program Error bit, VPP Error bit, Protection Error bit). It is not necessary to
set the WEL bit before the Clear Flag Status Register instruction is executed. The WEL bit
will be unchanged after this command is executed.
Figure 92. Clear Flag Status Register instruction sequence QIO-SPI
Read NV Configuration Register
The Read Non Volatile Configuration Register (RDNVCR) instruction allows the Non Volatile
Configuration Register to be read.
Figure 93. Read NV Configuration Register instruction sequence QIO-SPI
DQ0
DQ3
DQ1
DQ2
S
C
DQ1
DQ0
DQ2
DQ3
S
C
Instruction
0
Instruction
0
1
1
LS Byte MS Byte
Nonvolatile Configuration
2
5
4
6
7
3
1 13 9
0 12 8
2 14 10
3 15 11
Register Out
4
5