atmega32u4-16mu ATMEL Corporation, atmega32u4-16mu Datasheet - Page 127
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atmega32u4-16mu
Manufacturer Part Number
atmega32u4-16mu
Description
Atmega32u4 8-bit Avr Microcontroller With 32k Bytes Of Isp Flash And Usb Controller
Manufacturer
ATMEL Corporation
Datasheet
1.ATMEGA32U4-16MU.pdf
(431 pages)
- Current page: 127 of 431
- Download datasheet (6Mb)
14.10 16-bit Timer/Counter Register Description
14.10.1
14.10.2
7766A–AVR–03/08
Timer/Counter1 Control Register A – TCCR1A
Timer/Counter3 Control Register A – TCCR3A
Figure 14-13. Timer/Counter Timing Diagram, with Prescaler (f
•
•
•
The COMnA1:0, COMnB1:0, and COMnC1:0 control the output compare pins (OCnA, OCnB,
and OCnC respectively) behavior. If one or both of the COMnA1:0 bits are written to one, the
OCnA output overrides the normal port functionality of the I/O pin it is connected to. If one or
both of the COMnB1:0 bits are written to one, the OCnB output overrides the normal port func-
tionality of the I/O pin it is connected to. If one or both of the COMnC1:0 bits are written to one,
the OCnC output overrides the normal port functionality of the I/O pin it is connected to. How-
ever, note that the Data Direction Register (DDR) bit corresponding to the OCnA, OCnB or
OCnC pin must be set in order to enable the output driver.
and ICF n
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit 7:6 – COMnA1:0: Compare Output Mode for Channel A
Bit 5:4 – COMnB1:0: Compare Output Mode for Channel B
Bit 3:2 – COMnC1:0: Compare Output Mode for Channel C
(PC and PFC PWM)
TOVn
(CTC and FPWM)
(Update at TOP)
TCNTn
TCNTn
OCRnx
(clk
as TOP)
clk
clk
I/O
(FPWM)
I/O
Tn
/8)
(if used
7
COM1A
1
R/W
0
7
COM3A
1
R/W
0
6
COM1A
0
R/W
0
6
COM3A
0
R/W
0
TOP - 1
TOP - 1
Old OCRnx Value
R/W
R/W
5
COM1B
1
0
5
COM3B
1
0
R/W
R/W
4
COM1B
0
0
4
COM3B
0
0
TOP
TOP
3
COM1C
1
R/W
0
3
COM3C
1
R/W
0
2
COM1C
0
R/W
0
2
COM3C
0
R/W
0
BOTTOM
TOP - 1
New OCRnx Value
clk_I/O
1
WGM11
R/W
0
1
WGM3
1
R/W
0
/8)
ATmega32U4
BOTTOM + 1
0
WGM1
0
R/W
0
0
WGM3
0
R/W
0
TOP - 2
TCCR1
A
TCCR3
A
127
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