atmega32u4-16mu ATMEL Corporation, atmega32u4-16mu Datasheet - Page 288
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atmega32u4-16mu
Manufacturer Part Number
atmega32u4-16mu
Description
Atmega32u4 8-bit Avr Microcontroller With 32k Bytes Of Isp Flash And Usb Controller
Manufacturer
ATMEL Corporation
Datasheet
1.ATMEGA32U4-16MU.pdf
(431 pages)
- Current page: 288 of 431
- Download datasheet (6Mb)
23.8
23.9
288
Suspend, Wake-up and Resume
Detach
ATmega32U4
ADDEN is cleared by hardware:
When this bit is cleared, the default device address 00h is used.
After a period of 3 ms during which the USB line was inactive, the controller switches to the full-
speed mode and triggers (if enabled) the SUSPI (suspend) interrupt. The firmware may then set
the FRZCLK bit.
The CPU can also, depending on software architecture, enter in the idle mode to lower again the
power consumption.
There are two ways to recover from the “Suspend” mode:
There are no relationship between the SUSPI interrupt and the WAKEUPI interrupt: the WAKE-
UPI interrupt is triggered as soon as there are non-idle patterns on the data lines. Thus, the
WAKEUPI interrupt can occurs even if the controller is not in the “suspend” mode.
When the WAKEUPI interrupt is triggered, if the SUSPI interrupt bit was already set, it is cleared
by hardware.
When the SUSPI interrupt is triggered, if the WAKEUPI interrupt bit was already set, it is cleared
by hardware.
The reset value of the DETACH bit is 1.
It is possible to re-enumerate a device, simply by setting and clearing the DETACH bit (but firm-
ware must take in account a debouncing delay of some milliseconds).
Figure 23-3. Detach a device in Full-speed:
• after a power-up reset,
• when an USB reset is received,
• or when the macro is disabled (USBE cleared)
• First one is to clear the FRZCLK bit. This is possible if the CPU is not in the Idle mode.
• Second way, if the CPU is “idle”, is to enable the WAKEUPI interrupt (WAKEUPE set). Then,
• Setting DETACH will disconnect the pull-up on the D+ or D- pad (depending on full or low
as soon as an non-idle signal is seen by the controller, the WAKEUPI interrupt is triggered.
The firmware shall then clear the FRZCLK bit to restart the transfer.
speed mode selected). Then, clearing DETACH will connect the pull-up on the D+ or D- pad.
UVREF
EN=1
D +
D -
Detach, then
Attach
UVREF
EN=1
D +
D -
7766A–AVR–03/08
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