atmega32u4-16mu ATMEL Corporation, atmega32u4-16mu Datasheet - Page 41

• Manufacturer Part Number: atmega32u4-16mu
• Description: Atmega32u4 8-bit Avr Microcontroller With 32k Bytes Of Isp Flash And Usb Controller
• Manufacturer: ATMEL Corporation

7. Power Management and Sleep Modes
7.0.1
7766A–AVR–03/08
Sleep Mode Control Register – SMCR
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving
power. The AVR provides various sleep modes allowing the user to tailor the power consump-
tion to the application’s requirements.
To enter any of the five sleep modes, the SE bit in SMCR must be written to logic one and a
SLEEP instruction must be executed. The SM2, SM1, and SM0 bits in the SMCR Register select
which sleep mode (Idle, ADC Noise Reduction, Power-down, Power-save, or Standby) will be
activated by the SLEEP instruction. See
while the MCU is in a sleep mode, the MCU wakes up. The MCU is then halted for four cycles in
addition to the start-up time, executes the interrupt routine, and resumes execution from the
instruction following SLEEP. The contents of the Register File and SRAM are unaltered when
the device wakes up from sleep. If a reset occurs during sleep mode, the MCU wakes up and
executes from the Reset Vector.
Figure 6-1 on page 26
bution. The figure is helpful in selecting an appropriate sleep mode.
The Sleep Mode Control Register contains control bits for power management.
• Bits 3, 2, 1 – SM2..0: Sleep Mode Select Bits 2, 1, and 0
These bits select between the six available sleep modes as shown in
Table 7-1.
Note:
• Bit 1 – SE: Sleep Enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP
instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmer’s
purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the execution of
the SLEEP instruction and to clear it immediately after waking up.
Bit
Read/Write
Initial Value
SM2
0
0
0
0
1
1
1
1
1. Standby modes are only recommended for use with external crystals or resonators.
7
–
R
0
Sleep Mode Select
SM1
0
0
1
1
0
0
1
1
6
–
R
0
presents the different clock systems in the ATmega32U4, and their distri-
5
–
R
0
SM0
0
1
0
1
0
1
0
1
4
–
R
0
Table 7-1
Sleep Mode
Idle
ADC Noise Reduction
Power-down
Power-save
Reserved
Reserved
Standby
Extended Standby
3
SM2
R/W
0
for a summary. If an enabled interrupt occurs
(1)
2
SM1
R/W
0
(1)
1
SM0
R/W
0
Table
ATmega32U4
0
SE
R/W
0
7-1.
SMCR
41