at91cap7e ATMEL Corporation, at91cap7e Datasheet - Page 188

• Manufacturer Part Number: at91cap7e
• Description: Customizable Microcontroller
• Manufacturer: ATMEL Corporation

Reset value is 8 column bits.
• NR: Number of Row Bits
Reset value is 11 row bits.
• NB: Number of Banks
Reset value is two banks.
• CAS: CAS Latency
Reset value is two cycles.
In the SDRAMC, only a CAS latency of one, two and three cycles are managed. In any case, another value must be
programmed.
• DBW: Data Bus Width
Reset value is 16 bits
0: Data bus width is 32 bits.
1: Data bus width is 16 bits.
• TWR: Write Recovery Delay
Reset value is two cycles.
This field defines the Write Recovery Time in number of cycles. Number of cycles is between 0 and 15.
188
0
0
1
1
0
0
1
1
NR
NB
0
1
AT91CAP7E
0
0
1
1
NC
0
1
0
1
0
1
0
1
Number of Banks
CAS
Row Bits
Reserved
11
12
13
Column Bits
2
4
10
11
8
9
0
1
0
1
CAS Latency (Cycles)
Reserved
1
2
3
8549A–CAP–10/08