at91cap7e ATMEL Corporation, at91cap7e Datasheet - Page 91
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at91cap7e
Manufacturer Part Number
at91cap7e
Description
Customizable Microcontroller
Manufacturer
ATMEL Corporation
Datasheet
1.AT91CAP7E.pdf
(520 pages)
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17. Watchdog Timer (WDT)
17.1
17.2
Figure 17-1. Watchdog Timer Block Diagram
17.3
8549A–CAP–10/08
Description
Block Diagram
Functional Description
WDRSTT
WDT_CR
read WDT_SR
or
reset
write WDT_MR
The Watchdog Timer can be used to prevent system lock-up if the software becomes trapped in
a deadlock. It features a 12-bit down counter that allows a watchdog period of up to 16 seconds
(slow clock at 32.768 kHz). It can generate a general reset or a processor reset only. In addition,
it can be stopped while the processor is in debug mode or idle mode.
The Watchdog Timer can be used to prevent system lock-up if the software becomes trapped in
a deadlock. It is supplied with VDDCORE. It restarts with initial values on processor reset.
The Watchdog is built around a 12-bit down counter, which is loaded with the value defined in
the field WDV of the Mode Register (WDT_MR). The Watchdog Timer uses the Slow Clock
divided by 128 to establish the maximum Watchdog period to be 16 seconds (with a typical Slow
Clock of 32.768 kHz).
WDT_MR
WDD
WDERR
<= WDD
set
reset
reload
WDT_MR
WDV
12-bit Down
1
WDUNF
Counter
Current
Value
= 0
reset
set
0
1/128
reload
WDRSTEN
WDT_MR
WDT_MR
WDFIEN
SLCK
(to Reset Controller)
wdt_int
wdt_fault
AT91CAP7E
91
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