at91cap7e ATMEL Corporation, at91cap7e Datasheet - Page 51

• Manufacturer Part Number: at91cap7e
• Description: Customizable Microcontroller
• Manufacturer: ATMEL Corporation

11.5.3
Figure 11-7. Write to FPGA
Figure 11-8. Read from FPGA
8549A–CAP–10/08
PIO-FPGA Waveforms
WR / RD_
AHB CLK
START
DATA
WR / RD_
AHB CLK
START
DATA
t1
t1
data
NOTE
Figure
The access time is calculated as the sum of:
Using the GCC compiler with maximum optimizations, the system takes approximately 55
AHB cycles to perform the write operation to the FPGA.
Figure 11-8
Address Phase
Address Phase
Address
11-7shows the PIO timing when writing to FPGA.
Address
These algorithms are for a basic transfer, a more sophisticated algorithm is
necessary to establish a proper communication between the ARM microcontroller
and the FPGA.
shows the PIO timing when reading from the FPGA.
PIO_DATA_DIR = INPUT; // Set PIO-Data direction as input to receive the
DELAY(WAIT_FOR_FPGA); // wait for the FPGA to send the data
DATA_FROM_FPGA = *PIO_DATA; // this is the end of read cycle
T
access-Pio
t2
t2
= t1 + address phase + t2 + data phase
Data from FPGA
Data Phase
Data Phase
Data
AT91CAP7E
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