at91cap7e ATMEL Corporation, at91cap7e Datasheet - Page 220

• Manufacturer Part Number: at91cap7e
• Description: Customizable Microcontroller
• Manufacturer: ATMEL Corporation

24.2.9
24.2.9.1
220
AT91CAP7E
Clock Switching Details
Master Clock Switching Timings
Table 24-1
from one selected clock to another one. This is in the event that the prescaler is de-activated.
When the prescaler is activated, an additional time of 64 clock cycles of the new selected clock
has to be added.
Table 24-1.
Notes:
Table 24-2.
To
Main Clock
SLCK
PLL Clock
To
PLLA Clock
PLLB Clock
1. PLL designates either the PLL A or the PLL B Clock.
2. PLLCOUNT designates either PLLACOUNT or PLLBCOUNT.
From
and
From
Clock Switching Timings (Worst Case)
Clock Switching Timings Between Two PLLs (Worst Case)
Table 24-2
PLLCOUNT x SLCK +
0.5 x Main Clock +
0.5 x Main Clock +
2.5 x PLLx Clock
Main Clock
4.5 x SLCK
4 x SLCK +
PLLACOUNT x SLCK
2.5 x PLLA Clock +
–
give the worst case timings required for the Master Clock to switch
3 x PLLB Clock +
1.5 x PLLB Clock
PLLA Clock
4 x SLCK +
4 x SLCK +
PLLCOUNT x SLCK
2.5 x PLL Clock +
2.5 x Main Clock
4 x SLCK +
5 x SLCK +
SLCK
–
PLLBCOUNT x SLCK
2.5 x PLLB Clock +
3 x PLLA Clock +
1.5 x PLLA Clock
PLLB Clock
4 x SLCK +
4 x SLCK +
PLLCOUNT x SLCK
2.5 x PLL Clock +
3 x PLL Clock +
3 x PLL Clock +
1 x Main Clock
4 x SLCK +
4 x SLCK +
PLL Clock
5 x SLCK
8549A–CAP–10/08