at32uc3b0512-z2ues ATMEL Corporation, at32uc3b0512-z2ues Datasheet - Page 174

• Manufacturer Part Number: at32uc3b0512-z2ues
• Description: 32-bit Avr Microcontroller
• Manufacturer: ATMEL Corporation

17.5.1
17.5.1.1
17.5.1.2
17.5.1.3
32059J–12/2010
Basic Operation
I/O Line or peripheral function selection
Peripheral selection
Output control
Figure 17-2. Overview of the GPIO Pad Connections
When a pin is multiplexed with one or more peripheral functions, the selection is controlled with
the GPIO Enable Register (GPER). If a bit in GPER is written to one, the corresponding pin is
controlled by the GPIO. If a bit is written to zero, the corresponding pin is controlled by a periph-
eral function.
The GPIO provides multiplexing of up to four peripheral functions on a single pin. The selection
is performed by accessing Peripheral Mux Register 0 (PMR0) and Peripheral Mux Register 1
(PMR1).
When the I/O line is assigned to a peripheral function, i.e. the corresponding bit in GPER is writ-
ten to zero, the drive of the I/O line is controlled by the peripheral. The peripheral, depending on
the value in PMR0 and PMR1, determines whether the pin is driven or not.
When the I/O line is controlled by the GPIO, the value of the Output Driver Enable Register
(ODER) determines if the pin is driven or not. When a bit in this register is written to one, the cor-
Periph. C output enable
Periph. D output enable
Periph. A output enable
Periph. B output enable
Periph. A output data
Periph. B output data
Periph. C output data
Periph. D output data
Periph. A input data
Periph. B input data
Periph. C input data
Periph. D input data
PMR1
PMR0
ODER
OVR
GPER
Glitch Filter
PVR
GFER
1
0
0
1
0
1
Edge Detector
IMR1
IMR0
IER
1
0
PUER
AT32UC3B
Interrupt Request
PAD
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