at32uc3b0512-z2ues ATMEL Corporation, at32uc3b0512-z2ues Datasheet - Page 244

• Manufacturer Part Number: at32uc3b0512-z2ues
• Description: 32-bit Avr Microcontroller
• Manufacturer: ATMEL Corporation

19.13.6.2
Figure 19-28. Clock Synchronization in Write Mode
Notes:
32059J–12/2010
TWI_RHR
TXCOMP
SVREAD
SCLWS
RXRDY
SVACC
TWCK
1. At the end of the read sequence, TXCOMP is set after a STOP or after a REPEATED_START + an address different from
2. SCLWS is automatically set when the clock synchronization mechanism is started and automatically reset when the mecha-
TWD
SADR.
nism is finished.
Clock Synchronization in Write Mode
S
SADR
As soon as a START is detected
The clock is tied low if the shift register and the RHR is full. If a STOP or REPEATED_START
condition was not detected, it is tied low until RHR is read.
Figure 19-28 on page 244
W
A
DATA0
CLOCK is tied low by the TWI as long as RHR is full
A
describes the clock synchronization in Read mode.
DATA1
DATA0 is not read in the RHR
SCL is stretched on the last bit of DATA1
Rd DATA0
A
Rd DATA1
DATA1
DATA2
NA
Rd DATA2
DATA2
AT32UC3B
S
ADR
244