at32uc3b0512-z2ues ATMEL Corporation, at32uc3b0512-z2ues Datasheet - Page 199

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at32uc3b0512-z2ues

Manufacturer Part Number
at32uc3b0512-z2ues
Description
32-bit Avr Microcontroller
Manufacturer
ATMEL Corporation
Datasheet
Figure 18-3. SPI Transfer Format (NCPHA = 1, 8 bits per transfer)
Figure 18-4. SPI Transfer Format (NCPHA = 0, 8 bits per transfer)
32059J–12/2010
SPCK cycle (for reference)
SPCK cycle (for reference)
(from master)
(from slave)
(CPOL = 0)
(CPOL = 1)
(to slave)
(from master)
(from slave)
(CPOL = 0)
(CPOL = 1)
SPCK
SPCK
MOSI
MISO
(to slave)
NSS
SPCK
SPCK
MOSI
MISO
NSS
the NCPHA bit. These two parameters determine the edges of the clock signal on which data is
driven and sampled. Each of the two parameters has two possible states, resulting in four possi-
ble combinations that are incompatible with one another. Thus, a master/slave pair must use the
same parameter pair values to communicate. If multiple slaves are used and fixed in different
configurations, the master must reconfigure itself each time it needs to communicate with a dif-
ferent slave.
Table 18-2
Table 18-2.
Figure 18-3 on page 199
***
1
MSB
MSB
MSB
1
shows the four modes and corresponding parameter settings.
MSB
*** Not Defined, but normaly MSB of previous character received
SPI modes
2
6
6
2
SPI Mode
6
6
3
0
1
2
3
5
5
and
3
5
5
Figure 18-4 on page 199
4
4
4
4
4
4
5
3
3
5
3
3
6
2
2
6
2
2
show examples of data transfers.
7
1
1
CPOL
7
0
0
1
1
1
1
8
LSB
8
LSB
LSB
LSB
AT32UC3B
***
NCPHA
1
0
1
0
199

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