at32uc3b0512-z2ues ATMEL Corporation, at32uc3b0512-z2ues Datasheet - Page 282
at32uc3b0512-z2ues
Manufacturer Part Number
at32uc3b0512-z2ues
Description
32-bit Avr Microcontroller
Manufacturer
ATMEL Corporation
Datasheet
1.AT32UC3B0512-Z2UES.pdf
(680 pages)
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• START: Receive Start Selection
• CKG: Receive Clock Gating Selection
• CKI: Receive Clock Inversion
• CKO: Receive Clock Output Mode Selection
• CKS: Receive Clock Selection
32059J–12/2010
START
Others
Others
CKG
CKS
CKO
0
1
2
3
0
1
2
3
4
5
6
7
8
0
1
2
3
0
1
2
CKI affects only the receive clock and not the output clock signal.
1: The data inputs (Data and Frame Sync signals) are sampled on receive clock rising edge. The Frame Sync signal output is
shifted out on receive clock falling edge.
0: The data inputs (Data and Frame Sync signals) are sampled on receive clock falling edge. The Frame Sync signal output is
shifted out on receive clock rising edge.
Selected Receive Clock
Divided clock
TX_CLOCK clock signal
RX_CLOCK pin
Reserved
Continuous, as soon as the receiver is enabled, and immediately after the end of
transfer of the previous data.
Transmit start
Detection of a low level on RX_FRAME_SYNC signal
Detection of a high level on RX_FRAME_SYNC signal
Detection of a falling edge on RX_FRAME_SYNC signal
Detection of a rising edge on RX_FRAME_SYNC signal
Detection of any level change on RX_FRAME_SYNC signal
Detection of any edge on RX_FRAME_SYNC signal
Compare 0
Reserved
None, continuous clock
Receive Clock enabled only if RX_FRAME_SYNC is low
Receive Clock enabled only if RX_FRAME_SYNC is high
Reserved
Receive Clock Output Mode
None
Continuous receive clock
Receive clock only during data transfers
Reserved
Receive Start
Receive Clock Gating
RX_CLOCK pin
Input-only
Output
Output
AT32UC3B
282
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