at32uc3b0512-z2ues ATMEL Corporation, at32uc3b0512-z2ues Datasheet - Page 366
at32uc3b0512-z2ues
Manufacturer Part Number
at32uc3b0512-z2ues
Description
32-bit Avr Microcontroller
Manufacturer
ATMEL Corporation
Datasheet
1.AT32UC3B0512-Z2UES.pdf
(680 pages)
- Current page: 366 of 680
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22.3
32059J–12/2010
Block Diagram
Table 22-2.
The USBB provides a hardware device to interface a USB link to a data flow stored in a dual-port
RAM (DPRAM).
The USBB requires a 48MHz ± 0.25% reference clock, which is the USB generic clock gener-
ated from one of the power manager oscillators, optionally through one of the power manager
PLLs.
The 48MHz clock is used to generate a 12MHz full-speed (or 1.5 MHz low-speed) bit clock from
the received USB differential data and to transmit data according to full- or low-speed USB
device tolerance. Clock recovery is achieved by a digital phase-locked loop (a DPLL, not repre-
sented), which complies with the USB jitter specifications.
Pipe/Endpoint
4
5
6
Example of Configuration of Pipes/Endpoints Using the Whole DPRAM
Mnemonic
PEP4
PEP5
PEP6
256 bytes
256 bytes
64 bytes
Size
Nb. Banks
2
1
1
AT32UC3B
366
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