at32uc3b0512-z2ues ATMEL Corporation, at32uc3b0512-z2ues Datasheet - Page 330
at32uc3b0512-z2ues
Manufacturer Part Number
at32uc3b0512-z2ues
Description
32-bit Avr Microcontroller
Manufacturer
ATMEL Corporation
Datasheet
1.AT32UC3B0512-Z2UES.pdf
(680 pages)
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21.6.5.3
Figure 21-34. IrDA Demodulator Operations
32059J–12/2010
CLK_USART
Receiver
Counter
Value
Input
RXD
IrDA Demodulator
6
5
4
Rejected
Table 21-11. IrDA Baud Rate Error (Continued)
The demodulator is based on the IrDA Receive filter comprised of an 8-bit down counter which is
loaded with the value programmed in IFR. When a falling edge is detected on the RXD pin, the
Filter Counter starts counting down at the CLK_USART speed. If a rising edge is detected on the
RXD pin, the counter stops and is reloaded with IFR. If no rising edge is detected when the
counter reaches 0, the input of the receiver is driven low during one bit time.
Figure 21-34
As the IrDA mode uses the same logic as the ISO7816, note that the FI_DI_RATIO field in FIDI
must be set to a value higher than 0 in order to assure IrDA communications operate correctly.
Pulse
Peripheral Clock
40 000 000
3 686 400
20 000 000
32 768 000
40 000 000
3 686 400
20 000 000
32 768 000
40 000 000
3 686 400
20 000 000
32 768 000
40 000 000
3 686 400
20 000 000
32 768 000
3
2
6
illustrates the operations of the IrDA demodulator.
6
5
Baud Rate
4
57 600
38 400
38 400
38 400
38 400
19 200
19 200
19 200
19 200
9 600
9 600
9 600
9 600
2 400
2 400
2 400
3
2
1
0
Accepted
Pulse
107
130
130
213
260
521
853
CD
43
33
53
65
12
65
24
96
6
Driven Low During 16 Baud Rate Clock Cycles
Baud Rate Error
0.93%
0.00%
1.38%
0.63%
0.16%
0.00%
0.16%
0.31%
0.16%
0.00%
0.16%
0.16%
0.16%
0.00%
0.03%
0.04%
AT32UC3B
Pulse Time
19.53
19.53
19.53
19.53
78.13
78.13
78.13
3.26
4.88
4.88
4.88
4.88
9.77
9.77
9.77
9.77
330
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