mc9s08dz32amlfr Freescale Semiconductor, Inc, mc9s08dz32amlfr Datasheet - Page 133

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mc9s08dz32amlfr

Manufacturer Part Number
mc9s08dz32amlfr
Description
Hcs08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
6.5.9.3
6.5.9.4
Note: Slew rate reset default values may differ between engineering samples and final production parts. Always initialize slew
Freescale Semiconductor
PTJPE[7:0]
PTJSE[7:0]
Reset:
Reset:
Field
Field
7:0
7:0
rate control to the desired value to ensure correct operation.
W
W
R
R
PTJPE7
PTJSE7
Internal Pull Enable for Port J Bits — Each of these control bits determines if the internal pull-up device is
enabled for the associated PTJ pin. For port J pins that are configured as outputs, these bits have no effect and
the internal pull devices are disabled.
0 Internal pull-up device disabled for port J bit n.
1 Internal pull-up device enabled for port J bit n.
Output Slew Rate Enable for Port J Bits — Each of these control bits determines if the output slew rate control
is enabled for the associated PTJ pin. For port J pins that are configured as inputs, these bits have no effect.
0 Output slew rate control disabled for port J bit n.
1 Output slew rate control enabled for port J bit n.
Port J Pull Enable Register (PTJPE)
0
Port J Slew Rate Enable Register (PTJSE)
0
7
7
Pull-down devices only apply when using pin interrupt functions, when
corresponding edge select and pin select functions are configured.
PTJPE6
PTJSE6
Figure 6-54. Internal Pull Enable for Port J Register (PTJPE)
Figure 6-55. Slew Rate Enable for Port J Register (PTJSE)
0
0
6
6
Table 6-52. PTJPE Register Field Descriptions
Table 6-53. PTJSE Register Field Descriptions
MC9S08DZ128 Series Data Sheet, Rev. 1
PTJPE5
PTJSE5
0
0
5
5
PTJPE4
PTJSE4
NOTE
0
0
4
4
Description
Description
PTJPE3
PTJSE3
3
0
3
0
PTJPE2
PTJSE2
Chapter 6 Parallel Input/Output Control
0
0
2
2
PTJPE1
PTJSE1
0
0
1
1
PTJPE0
PTJSE0
0
0
0
0
133

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