mc9s08dz32amlfr Freescale Semiconductor, Inc, mc9s08dz32amlfr Datasheet - Page 394

• Manufacturer Part Number: mc9s08dz32amlfr
• Description: Hcs08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Chapter 18 Debug Module (S08DBGV3) (128K)
18.1.2
The on-chip ICE system can be enabled in all MCU functional modes. The DBG module is disabled if the
MCU is secure. The DBG module comparators are disabled when executing a Background Debug Mode
(BDM) command.
18.1.3
18.2
The DBG module contains no external signals.
394
Figure 18-1
•
Instr. Lastcycle
1. In 64K versions of this module there are only 16 address lines [15:0], there are no core_cpu_aob_14_t2,
core_cpu_aob_15_t2, core_ppage_t2[2:0], and ppage_sel signals.
Ability to End-trace until reset and Begin-trace from reset
Bus Clk
Signal Description
core_cof[1:0]
core_cpu_aob_15_t2
core_ppage_t2[2:0]
Address Bus[16:0]
MCU in BDM
MCU reset
Write Data Bus
Read Data Bus
mmu_ppage_sel
core_cpu_aob_14_t2
DBG Module Enable
Read/Write
Modes of Operation
Block Diagram
shows the structure of the DBG module.
Write Data Bus
Read Data Bus
DBG Read Data Bus
subtract 2
register
Read/Write
1
1
1
1
1
m
u
x
Change of Flow Indicators
MC9S08DZ128 Series Data Sheet, Rev. 1
c
o
n
t
r
o
l
Figure 18-1. DBG Block Diagram
m
u
x
Address/Data/Control Registers
Comparator C
Comparator A
Comparator B
m
u
x
8 deep
FIFO
event only
FIFO Data
control
addr[16:0]
match_A
ppage_sel
match_C
match_B
store
1
1
m
u
x
Trigger
Break
Control
Logic
Freescale Semiconductor
FIFO Data
Read DBGFL
Read DBGFH
Read DBGFX
Tag
Force