mc9s08dz32amlfr Freescale Semiconductor, Inc, mc9s08dz32amlfr Datasheet - Page 278

• Manufacturer Part Number: mc9s08dz32amlfr
• Description: Hcs08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Chapter 12 Freescale’s Controller Area Network (S08MSCANV1)
Section 12.3.10, “MSCAN Transmit Buffer Selection Register
when RXF flag is set (see
Write: For transmit buffers, anytime when TXEx flag is set (see
Register
Section 12.3.10, “MSCAN Transmit Buffer Selection Register
receive buffers.
Reset: Undefined (0x00XX) because of RAM-based implementation
1
2
12.4.1
The identifier registers for an extended format identifier consist of a total of 32 bits; ID[28:0], SRR, IDE,
and RTR bits. The identifier registers for a standard format identifier consist of a total of 13 bits; ID[10:0],
RTR, and IDE bits.
12.4.1.1
278
The position of RTR differs between extended and standard indentifier mapping.
IDE is 0.
Register
Name
IDR0
IDR1
IDR2
IDR3
Reset:
(CANTFLG)”) and the corresponding transmit buffer is selected in CANTBSEL (see
W
R
Identifier Registers (IDR0–IDR3)
IDR0–IDR3 for Extended Identifier Mapping
Figure 12-24. Receive/Transmit Message Buffer — Standard Identifier Mapping
W
W
W
W
R
R
R
R
ID28
7
x
Figure 12-25. Identifier Register 0 (IDR0) — Extended Identifier Mapping
Bit 7
ID10
ID2
Section 12.3.4.1, “MSCAN Receiver Flag Register
ID27
= Unused, always read ‘x’
6
x
ID9
ID1
6
MC9S08DZ128 Series Data Sheet, Rev. 1
ID26
5
x
ID8
ID0
5
ID25
4
x
RTR
ID7
4
1
ID24
Section 12.3.6, “MSCAN Transmitter Flag
(CANTBSEL)”). For receive buffers, only
(CANTBSEL)”). Unimplemented for
x
3
IDE
ID6
3
2
ID23
2
x
ID5
2
(CANRFLG)”).
Freescale Semiconductor
ID22
ID4
x
1
1
ID21
Bit 0
ID3
0
x