mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 232

• Manufacturer Part Number: mc9s12vr48
• Description: S12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

S12S Debug Module (S12SDBGV2)
Field3 Bits in Compressed Pure PC Modes
Each time that PC[17:6] differs from the previous base PC[17:6], then a new base address is stored. The
base address zero value is the lowest address in the 64 address range
The first line of the trace buffer always gets a base PC address, this applies also on rollover.
6.4.5.5
The data stored in the Trace Buffer can be read provided the DBG module is not armed, is configured for
tracing (TSOURCE bit is set) and the system not secured. When the ARM bit is written to 1 the trace buffer
is locked to prevent reading. The trace buffer can only be unlocked for reading by a single aligned word
write to DBGTB when the module is disarmed.
The Trace Buffer can only be read through the DBGTB register using aligned word reads, any byte or
misaligned reads return 0 and do not cause the trace buffer pointer to increment to the next trace buffer
address. The Trace Buffer data is read out first-in first-out. By reading CNT in DBGCNT the number of
valid lines can be determined. DBGCNT does not decrement as data is read.
Whilst reading an internal pointer is used to determine the next line to be read. After a tracing session, the
pointer points to the oldest data entry, thus if no rollover has occurred, the pointer points to line0, otherwise
it points to the line with the oldest entry. In compressed Pure PC mode on rollover the line with the oldest
232
Pure PC Mode
Compressed
INF1
0
0
1
1
Reading Data from Trace Buffer
Configured for end aligned triggering in compressed PurePC mode, then
after rollover it is possible that the oldest base address is overwritten. In this
case all entries between the pointer and the next base address have lost their
base address following rollover. For example in
rollover has occurred, Line 1, PC1, is overwritten with a new entry. Thus the
entries on Lines 2 and 3 have lost their base address. For reconstruction of
program flow the first base address following the pointer must be used, in
the example, Line 4. The pointer points to the oldest entry, Line 2.
INF0
0
1
0
1
Table 6-41. Compressed Pure PC Mode Field 3 Information Bit Encoding
Line 1
Line 2
Line 3
Line 4
Line 5
Line 6
Base PC address TB[17:0] contains a full PC[17:0] value
Trace Buffer[5:0] contain incremental PC relative to base address zero value
Trace Buffer[11:0] contain next 2 incremental PCs relative to base address zero value
Trace Buffer[17:0] contain next 3 incremental PCs relative to base address zero value
00
11
01
00
10
00
MC9S12VR Family Reference Manual,
Preliminary - Subject to Change Without Notice
PC4
0
0
TRACE BUFFER ROW CONTENT
NOTE
PC1 (Initial 18-bit PC Base Address)
PC6 (New 18-bit PC Base Address)
PC9 (New 18-bit PC Base Address)
Table 6-40
PC3
PC8
Rev. 2.2
0
if one line of
Freescale Semiconductor
PC2
PC5
PC7