mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 560

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mc9s12vr48

Manufacturer Part Number
mc9s12vr48
Description
S12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
FTMRG Electrical Specifications
M.1.12
The maximum set user margin level time is given by:
M.1.13
The maximum set field margin level time is given by:
M.1.14
The time required to Erase Verify D-Flash for a given number of words N
M.1.15
D-Flash programming time is dependent on the number of words being programmed and their location
with respect to a row boundary since programming across a row boundary requires extra steps.
The typical D-Flash programming time is given by the following equation, where N
of words:
The maximum D-Flash programming time is given by:
M.1.16
Typical D-Flash sector erase times, expected on a new device where no margin verify fails occur, is given
by:
560
t
t
t
t
=
=
dcheck
dera
500
510
5025
Set User Margin Level (FCMD=0x0D)
Set Field Margin Level (FCMD=0x0E)
Erase Verify D-Flash Section (FCMD=0x10)
Program D-Flash (FCMD=0x11)
Erase D-Flash Sector (FCMD=0x12)
-------------------- -
f
-------------------- -
f
(
NVMBUS
NVMBUS
520
1
1
+
----------------- -
f
NVMOP
N
1
W
)
t
t
dpgm
dpgm
+
-------------------- -
f
NVMBUS
710
1
(
-------------------- -
f
(
(
NVMBUS
(
34 N
MC9S12VR Family Reference Manual,
Preliminary - Subject to Change Without Notice
34 N
1
W
W
) )
) )
----------------- -
f
----------------- -
f
NVMOP
NVMOP
1
1
+
+
(
(
600
600
+
+
(
(
1020
940 N
Rev. 2.2
N
W
W
)
)
)
)
-------------------- -
f
W
NVMBUS
-------------------- -
f
NVMBUS
is given by:
1
1
W
Freescale Semiconductor
denotes the number

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