mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 273

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mc9s12vr48

Manufacturer Part Number
mc9s12vr48
Description
S12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
8.4
The ADC12B6C consists of an analog sub-block and a digital sub-block.
8.4.1
The analog sub-block contains all analog electronics required to perform a single conversion. Separate
power supplies VDDA and VSSA allow to isolate noise of other MCU circuitry from the analog sub-block.
8.4.1.1
The Sample and Hold Machine controls the storage and charge of the sample capacitor to the voltage level
of the analog signal at the selected ADC input channel.
During the sample process the analog input connects directly to the storage node.
The input analog signals are unipolar and must be within the potential range of VSSA to VDDA.
During the hold process the analog input is disconnected from the storage node.
8.4.1.2
The analog input multiplexer connects one of the 6 external analog input channels to the sample and hold
machine.
8.4.1.3
The A/D Machine performs analog to digital conversions. The resolution is program selectable to be either
8 or 10 or 12 bits. The A/D machine uses a successive approximation architecture. It functions by
comparing the sampled and stored analog voltage with a series of binary coded discrete voltages. By
following a binary search algorithm, the A/D machine identifies the discrete voltage that is nearest to the
sampled and stored voltage.
When not converting the A/D machine is automatically powered down.
Only analog input signals within the potential range of VRL to VRH (A/D reference potentials) will result
in a non-railed digital output code.
8.4.2
This subsection describes some of the digital features in more detail. See
Descriptions”
8.4.2.1
The external trigger feature allows the user to synchronize ATD conversions to an external event rather
than relying only on software to trigger the ATD module when a conversions is about to take place. The
external trigger signal (out of reset ATD channel 5, configurable in ATDCTL1) is programmable to be edge
Freescale Semiconductor
Functional Description
Analog Sub-Block
Digital Sub-Block
Sample and Hold Machine
Analog Input Multiplexer
Analog-to-Digital (A/D) Machine
External Trigger Input
for all details.
MC9S12VR Family Reference Manual, Rev. 2.2
Preliminary - Subject to Change Without Notice
Analog-to-Digital Converter (ADC12B6CV2)
Section 8.3.2, “Register
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