mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 97

• Manufacturer Part Number: mc9s12vr48
• Description: S12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

2.4.4.3
In case of an over-current condition on PP2 (see
over-current interrupt flag PIFP[OCIF] asserts. This flag generates an interrupt if the enable bit
PIEP[OCIE] is set.
An asserted flag immediately forces the output pin low to protect the device. The flag must be cleared to
re-enable the driver.
2.5
2.5.1
It is not recommended to write PORT[x]/PT[x] and DDR[x] in a word access. When changing the register
pins from inputs to outputs, the data may have extra transitions during the write access. Initialize the port
data register before enabling the outputs.
2.5.2
The ADC external trigger inputs ETRIG1-0 allow the synchronization of conversions to external trigger
events if selected as trigger source (for details refer to ATDCTL1[ETRIGSEL] and ATDCTL1[ETRIGCH]
configuration bits in ADC section). These signals are related to PWM channels 5-4 to support periodic
trigger applications with the ADC. Other pin functions can also be used as triggers.
If a PWM channel is routed to an alternative pin, the ETRIG input function will follow the relocation
accordingly.
If the related PWM channel is enabled and not routed for internal use, the PWM signal as seen on the pin
will drive the ETRIG input. Else the ETRIG function will be triggered by other functions on the pin
including general-purpose input.
Freescale Semiconductor
Initialization and Application Information
Port Data and Data Direction Register writes
ADC External Triggers ETRIG1-0
Over-Current Interrupt
Glitch, filtered out, no interrupt flag set
Valid pulse, interrupt flag set
Figure 2-47. Interrupt Glitch Filter (here: active low level selected)
MC9S12VR Family Reference Manual, Rev. 2.2
Preliminary - Subject to Change Without Notice
t
PULSE
(min) t
uncertain
Section 2.5.3, “Over-Current Protection on
PULSE
(max)
Port Integration Module (S12VRPIMV2)
EVDD”) the
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