mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 550

• Manufacturer Part Number: mc9s12vr48
• Description: S12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

SPI Electrical Specifications
In Table K-2. the timing characteristics for master mode are listed.
550
Num
1
pls. see Figure K-3.
10
11
12
13
1
1
2
3
4
5
6
9
C
D
D
D
D
D
D
D
D
D
D
D
D
(CPOL = 0)
(CPOL = 1)
(OUTPUT)
(OUTPUT)
(OUTPUT)
(OUTPUT)
1. If enabled.
2. LSBFE = 0. For LSBFE = 1, bit order is LSB, bit 1, ..., bit 6, MSB.
(INPUT)
SCK Frequency
SCK Period
Enable Lead Time
Enable Lag Time
Clock (SCK) High or Low Time
Data Setup Time (Inputs)
Data Hold Time (Inputs)
Data Valid after SCK Edge
Data Valid after SS fall (CPHA=0)
Data Hold Time (Outputs)
Rise and Fall Time Inputs
Rise and Fall Time Outputs
MISO
MOSI
SCK
SCK
SS
1
Characteristic
9
Table K-2. SPI Master Mode Timing Characteristics
2
MC9S12VR Family Reference Manual,
Figure K-2. SPI Master Timing (CPHA=1)
Preliminary - Subject to Change Without Notice
4
MASTER MSB OUT
5
MSB IN
1
2
6
4
2
Symbol
t
t
t
t
f
t
wsck
12
12
t
vsck
lead
t
t
t
vss
sck
sck
t
t
lag
11
su
ho
rfo
rfi
BIT 6 . . . 1
hi
BIT 6 . . . 1
1/2048
Min
2
—
—
—
—
—
—
—
8
8
0
1
Rev. 2.2
13
13
MASTER LSB OUT
Typ
1/2
1/2
1/2
—
—
—
—
—
—
—
—
—
LSB IN
Freescale Semiconductor
2048
Max
1
3
15
15
—
—
—
—
—
—
/
8
8
2
1
Unit
f
t
t
t
t
bus
ns
ns
ns
ns
ns
ns
ns
bus
sck
sck
sck