cx29600 Mindspeed Technologies, cx29600 Datasheet - Page 133

• Manufacturer Part Number: cx29600
• Description: Optiphytm - M155 Sts-3 Sonet/sdh Multiplexer
• Manufacturer: Mindspeed Technologies

CX29600
CX29600 Data Sheet
ERRINS (Error Insertion Control Register)
The ERRINS register controls error insertion into various octets for diagnostic purposes. These bits are
automatically cleared by internal circuitry after the indicated error insertion has taken place. Clearing takes
precedence over a simultaneous write operation to this register.
ERRPAT (Error Pattern Control Register)
The ERRPAT register provides the error pattern for the error insertion functions listed in the ERRINS register.
Each bit in the error pattern register is XORed with the corresponding bit of the octet to be errored.
29600-DSH-001-B
7-0
Bit
Bit
7
6
5
4
3
2
1
0
Default
Default
00h
0
0
0
0
0
0
0
0
hex address: 0x015
hex address: 0x016
ErrPat[7:0]
InsPrbsErr
InsB2Err1
InsB2Err2
InsB2Err3
InsB1Err
InsREI-L
Mindspeed Technologies
InsFrErr
Name
Name
—
When written to 1, this bit causes the last A1 byte to be inverted for
1 transmit frame. When written to 0, the A1 byte is not inverted.
When written to 1, this bit causes the B1 BIP calculation to be
XORed with the value in the ERRPAT register for 1 transmit frame.
When written to 1, this bit causes the B2-1 BIP calculation to be
XORed with the value in the ERRPAT register for 1 transmit frame.
When written to 1, this bit causes the B2-2 BIP calculation to be
XORed with the value in the ERRPAT register for 1 transmit frame.
When written to 1, this bit causes the B2-3 BIP calculation to be
XORed with the value in the ERRPAT register for 1 transmit frame.
When written to 1, this bit causes the contents of the ERRPAT
register to be transmitted as the REI-L value in the M1 byte for 1
transmit frame.
Force a prbs error to be generated by the PRBS generator.
Reserved, set to zero.
Error pattern used by Error Insertion Control Register.
™
Description
Description
4.1 Memory Map
4.0 Registers
4-27