cx29600 Mindspeed Technologies, cx29600 Datasheet - Page 167

• Manufacturer Part Number: cx29600
• Description: Optiphytm - M155 Sts-3 Sonet/sdh Multiplexer
• Manufacturer: Mindspeed Technologies

CX29600
CX29600 Data Sheet
TXK3 (Transmit K3 Overhead Control Register)
The TXK3 register controls the insertion of the K3 Path overhead byte position in the transmitter if enabled by
setting PTHINSL bit 0 low.
TXLIN (Transmit Line Overhead Control Register)
The TXLIN register controls the transmission of various octets in the Line Overhead of the SONET frame.
29600-DSH-001-B
7-0
Bit
Bit
7
6
5
4
3
2
1
0
Default
Default
00h
0
0
0
0
0
0
1
1
hex address:
hex address: 0x01D
EnTxLinDCC
LinDCCSrc
AutoRDI-L
AutoREI-L
TxK3[1:8]
InsRDI-L
InsAIS-L
Mindspeed Technologies
Name
Name
DisB2
EnE2
Transmit value for K3 overhead byte.
When written to 1, the transmit line DCC is enabled for insertion
from the source selected by bit 6. When written to 0, the D4–12
bytes contain 00h.
When written to 0, the source for the line DCC is the serial
interface. When written to 1, the source for the line DCC is the
SI-Bus interface.
When written to 1, the E2 byte is generated from data shifted in the
TxE2 input pin. When written to 0, the E2 byte contains 00h.
When written to 1, the B2 bytes contain 00h. When written to 0, the
B2 bytes contain the calculated result for line BIP.
When written to 1, AIS-L is generated.
When written to 1, RDI-L is generated.
When written to 1, automatic generation of RDI-L is enabled.
When written to 1, automatic generation of REI-L codes are
generated.
Path 1
Path 2
Path 3
Path 4
™
0x088
0x0C8
0x108
0x148
Description
Description
4.1 Memory Map
4.0 Registers
4-61