cx29600 Mindspeed Technologies, cx29600 Datasheet - Page 53

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cx29600

Manufacturer Part Number
cx29600
Description
Optiphytm - M155 Sts-3 Sonet/sdh Multiplexer
Manufacturer
Mindspeed Technologies
Datasheet
CX29600
CX29600 Data Sheet
Figure 2-7. Bellcore GR-253-CORE Jitter Specifications
29600-DSH-001-B
A
A
A
3
2
1
f
Jitter Tolerance
0
Jitter Frequency (Hz)
f
1
Slope = 20 dB/Decade
data from one of four sources based on the control bits TxClkSel[1:0] in the
CLKREC register as shown in
Table 2-4. TxClkSel[1:0] Control Bits
clock from the incoming NRZ data stream. The clock recovery circuit requires
the 19.44 MHz clock. When no NRZ data is present or when the signal detect
input (LSigDet_n) is low, indicating that the signal has been lost by the optical
transceiver, the receive clock recovery circuit free-runs at a nominal 155.52 MHz
so that a receive clock is always present for the receive data path and the transmit
path for loop-timed applications.
Bellcore GR-253 (see
defined as how much jitter the receiver can tolerate and still extract the correct
data from the incoming signal. Jitter transfer is the maximum amount of jitter that
any device is allowed to add to the data stream.
TxClkSel1
f
2
The transmit section synthesizes the 155.52 MHz clock used for transmitting
The receiver section uses an internal Phase Locked Loop (PLL) to recover the
This clock meets jitter tolerance and jitter transfer specifications according to
f
0
0
1
1
3
Mindspeed Technologies
f
4
TxClkSel0
0
1
0
1
Figure
Jitter
Gain
Synthesized from the 19.44 MHz reference on the
LTxSynRef pin (default).
Taken directly from the LTxClkIn+/–_n input pins. This
155.52 MHz clock must meet jitter specifications.
Uses the recovered clock from the CDR block for loop timed
operations.
Reserved.
2-7,
Table
Table
Acceptable
2-4.
Range
2-5, and
Jitter Transfer
Frequency (Hz)
Transmit Clock
f
c
Table
Slope = 20 dB/Decade
2-6). Jitter tolerance is
2.0 Functional Description
2.2 Clock Circuits
100518_012
2-9

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