cx29600 Mindspeed Technologies, cx29600 Datasheet - Page 32

• Manufacturer Part Number: cx29600
• Description: Optiphytm - M155 Sts-3 Sonet/sdh Multiplexer
• Manufacturer: Mindspeed Technologies

1.0 Product Description
1.5 Logic Diagram
Table 1-4. Pin Definitions (8 of 17)
1-18
ScanMode
TRST*
TCK
TMS
TDI
TDO
STxPrty
STxData[7]
STxData[6]
STxData[5]
STxData[4]
STxData[3]
STxData[2]
STxData[1]
STxData[0]
STxHSClk
STxClk
Pin Label
JTAG Test Reset
JTAG Test Clock
JTAG Test Mode
Select
JTAG Test Data Input
JTAG Test Data
Output
SI-Bus Transmit
Parity Input
SI-Bus Transmit Data
SI-Bus High Speed
Transmit Clock
SI-Bus Transmit
Clock
Scan mode
Signal Name
Mindspeed Technologies
No.
C20
C18
B17
A18
B18
C19
A19
D19
B19
A17
A20
A4
D5
B4
C6
A5
B5
pull-up
pull-up
pull-up
Type
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
™
I/O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
(1)
Internal scan control. Tie to
ground for normal operation. Set
to 1 for the scan test.
When this pin is asserted, the
internal boundary-scan logic is
reset. This pin has an internal
pull-up resistor.
Note: When JTAG is not used, this
pin should be tied either directly
to ground or though a 1K or less
pull down resistor.
This pin samples the value of TMS
and TDI on its rising edge in order
to control the boundary-scan
operations.
This pin controls the
boundary-scan Test Access Port
(TAP) controller operation. This
pin has an internal pull-up
resistor.
Serial test data input. This pin has
an internal pull-up resistor.
Serial test data output.
Odd parity calculated over
STxData[7:0].
SI-Bus transmit data from the
slave device.
A 51.84 MHz clock derived from
the 155.52/622.08 MHz
SONET/SDH receive line clock.
Generated for slave devices that
need a STS-1 bit rate clock.
SI-Bus 19.44 MHz clock used to
transfer 8-bit SI-Bus data from
the slave devices.
Description
CX29600 Data Sheet
29600-DSH-001-B
CX29600